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dpas Reconfigurable and Adaptive Systems Research
 RASR
    Evolvable Hardware
    Reliability
    Compiler
    Applications
    System Architecture
    Power Aware
    

Contact Info:
Team Leader:
Maya Gokhale
Email: maya@lanl.gov
Phone: 505-665-9095

Questions about this website: webmaster


Page Info:
Last modified:
27 Jun 2008
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ReliabilityAnalysisPublicationsDownloads

Reliability and Fault Management

Our research in this area is motivated by the need for reliable computation in severe environments. We are studying radiation effects on FPGAs as well as faults that might occur as device geometries shrink.

Radiation Effects and Mitigation for SRAM-Based FPGAs

Since 1998, Los Alamos has been involved with a project to put a reconfigurable computing system based on SRAM FPGAs into space. With the project, Los Alamos has closely collaborated with Xilinx to characterize the radiation tolerance of Virtex FPGAs, specifically, the XQVR line of FPGAs. In addition, Los Alamos and Xilinx have worked together of techniques and methods for using these FPGAs, which are still susceptible to single-event upsets, in a radiation environment.

We have been developing software tools to automatically mitigate SEU effects so that designers do not have to become both FPGA and radiation experts to put reconfigurable computing applications into space. There have been two recent products of this work: a hardware-based SEU emulator and an automated mitigation tool which removes half-latches from Virtex designs called RadDRC.

This work in automatic mitigation of radiation effects as well as the simulator work has been done in collaboration with Brigham Young University's Configurable Computing Laboratory. BYU's FPGA Reliability Studies site provides a nice overview of some of these technologies.

Reliability in nano-scale devices

As device geometries shrink, designing for reliability will be a significant concern for reconfigurable computing implemented with nanotechnology. We are studying methodologies and techniques for analyzing and improving the reliability of reconfigurable logic systems intended for implementation using nanotechnology.

As an introduction to our work, we have been working with our collaborators at Virginia Tech's FERMAT Lab to develop tools to help in the automatic evaluation of the reliability of logic circuits when implemented using nanotechnology. This can be found in the Analysis subsection of this Web site.

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