Los Alamos National LaboratoryGo to the Lab's home pageSearch for people in the Lab's directorySearch the Laboratory's Web site
dpas Reconfigurable and Adaptive Systems Research
 RASR
    Evolvable Hardware
    Reliability
    Compiler
    Applications
    System Architecture
    Power Aware
    

Contact Info:
Team Leader:
Maya Gokhale
Email: maya@lanl.gov
Phone: 505-665-9095

Questions about this website: webmaster


Page Info:
Last modified:
27 Jun 2008
Access Count: Unknown
 

Applications

We are interested in developing applications for reconfigurable supercomputers such as the Cray XD1, with dual-Opteron nodes, Xilinx Virtex 2 Pro FPGA, and a proprietary interconnection network. Our applications include Monte Carlo Radiative Heat Transfer (also available from FPL 2004, Springer Verlag, Publisher), Metropolitan Road Network Simulation (IEEE FCCM 2005), and simulation of lattice gas hydrodynamics.

Monte Carlo Radiative Heat Transfer

The RASR team is researching mapping floating point applications onto FPGAs. Newer, very large FPGAs can accommodate floating point's large operand size and excessive area use, so can potentially be used for implementing supercomputing applications. In addition, studies suggest that peak floating-point performance of FPGAs is growing significantly faster than peak floating point performance for a CPU. Monte Carlo radiative heat transfer is a floating point supercomputing application that traces a large number of photons emitted from the surfaces of a 2-D enclosure. We mapped the application's most compute-intensive inner loop onto Xilinx Virtex II and Virtex II Pro FPGAs. Using three single-precision floating point pipelines, we found that we could achieve a speed up of 10.37X versus running the application on a 3 GHz Pentium IV Xeon workstation.

Metropolitan Road Network Simulation

This work demonstrates that road traffic simulation of entire metropolitan areas is possible with reconfigurable supercomputing that combines 64-bit microprocessors and FPGAs in a high bandwidth, low latency interconnect. Previously, traffic simulation on FPGAs was limited to very short road segments or required a very large number of FPGAs. Our data streaming approach overcomes scaling issues associated with direct implementations and still allows for high-level parallelism by dividing the data sets between hardware and software across the reconfigurable supercomputer. Using one FPGA on the Cray XD1 supercomputer, we are able to achieve a 12.8X speed up over the AMD microprocessor. This result paves the way for accelerating other large infrastructure simulations.

 Los Alamos National Laboratory  Operated by the University of California for the National Nuclear Security Administration,
of the US Department of Energy.     Copyright © 2004 UC | Disclaimer/Privacy

 NOTICE: Information from this server resides on a computer system funded by the U.S. Department of Energy. Anyone using this system consents to monitoring of this use by system or security personnel. For complete conditions of use see Disclaimer/Privacy.